Design & Reuse
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67 IP
51
2.0
Ultra-speed FIR Filter
FIR filter designed for very high sample rate applications. Organized as a systolic array, the filter is modular and scalable, permitting the user to...
52
2.0
Colour-Space Converter
Converts 24-bit RGB to 30-bit YCbCr in 4:4:4 format and vice-versa. Features a fully pipelined design with simple flow-control and 1 x pixel/clock o...
53
2.0
Complex Digital Down Converter
High-precision 16-bit complex digital down-converter / IQ demodulator with a fully configurable decimation filter stage. Ideal for the conversion of I...
54
2.0
ASIP-1
The programmable filter engine (PFE) is a configurable and expandable IP that implements FIR, decimation, interpolation and IIR filtering functions. T...
55
2.0
ASIP-2
The FFT/IFFT/DCT engine is an application specific instruction set processor (ASIP) optimized for the implementation of Fourier and cosine transforms,...
56
2.0
Symmetrical FIR Filter
FIR filter designed for high sample rate applications with symmetrical coefficients and an even or odd number of taps. Features configurable coefficie...
57
1.0
Maximum normalised correlation core
The eSi-MNC core provides the control and data plane interfaces to a Maximum Normalised Correlation module. The signal processing in the core consist...
58
1.0
ADS-B 978 MHz (UAT) Receiver
ADS-B (UAT) receiver offers a comprehensive solution for the reception of ADS-B Flight, Traffic and Weather information. Compatible with all FPGA and ...
59
1.0
Digital Signal Processor IP
ZSPNano is the perfect choice for Always ON applications involving sound detection, voice quality enhancement and command recognition. It is a tiny, e...
60
1.0
Digital Signal Processor IP
ZSPNano+ is a small, energy efficient, Digital Signal Processor Core for high performance Voice/Audio/Wireless applications. The compiler friendly arc...
61
1.0
Digital Signal Processor IP
VeriSilicon's programmable ZSP Digital Signal Processor IP is a series of processor cores optimized for signal processing computation and data streami...
62
1.0
Digital Signal Processor IP
VeriSilicon's programmable ZSP Digital Signal Processor IP is a series of processor cores optimized for signal processing computation and data streami...
63
1.0
Digital Signal Processor IP
VeriSilicon's programmable ZSP Digital Signal Processor IP is a series of processor cores optimized for signal processing computation and data streami...
64
1.0
RLS Adaptive Filter
The eSi-QRD-LSL is a QR-Decomposition Least Squares Lattice (QRD-LSL) core is a high throughput IP core that finds application in challenging adaptive...
65
1.0
Precision Tone Decoder
Detects the presence of a single tone at a specified centre frequency. Features 16-bit data samples, programmable tone frequency, adjustable detectio...
66
0.0
N-Point FFT/IFFT
The Fast Fourier Transform (FFT) is an efficient algorithm for computing the Discrete Fourier Transform (DFT). This Intellectual Property core was des...
67
0.0
Digital filter with input sampling rate 2.56 MHz
The block consists of 4 low pass filters connected in serially. Decimation takes place during a filtration process after each stage. The total decima...